MAX5894 14-Bit, 500Msps, Interpolating and Modulating Dual DAC with CMOS Inputs

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The MAX5894 programmable interpolating, modulating, 500Msps, dual digital-to-analog converter (DAC) offers superior dynamic performance and is optimized for high-performance wideband, single-carrier transmit applications. The device integrates a selectable 2x/4x/8x interpolating filter, a digital quadrature modulator, and dual 14-bit, high-speed DACs on a single integrated circuit. At 30MHz output frequency and 500Msps update rate, the in-band SFDR is 86dBc while consuming 1.1W. The device also delivers 73dB ACLR for two-carrier WCDMA at a 61.44MHz output frequency.

The selectable interpolating filters allow lower input data rates while taking advantage of the high DAC update rates. These linear-phase interpolation filters ease reconstruction filter requirements and enhance the passband dynamic performance. Individual offset and gain programmability allow the user to calibrate out local oscillator (LO) feedthrough and sideband suppression errors generated by analog quadrature modulators.

The MAX5894 features a f_IM / 4 digital image-reject modulator. This modulator generates a quadrature-modulated IF signal that can be presented to an analog I/Q modulator to complete the upconversion process. A second digital modulation mode allows the signal to be frequency-translated with image pairs at f_IM / 2 or f_IM / 4.

The MAX5894 features a standard 1.8V CMOS, 3.3V tolerant data input bus for easy interface. A 3.3V SPI™ port is provided for mode configuration. The programmable modes include the selection of 2x/4x/8x interpolating filters, f_IM / 2, f_IM / 4 or no digital quadrature modulation with image rejection, channel gain and offset adjustment, and offset binary or two's complement data interface.

Pin-compatible 12- and 16-bit devices are also available. Refer to the MAX5893 data sheet for the 12-bit version and the MAX5895 data sheet for the 16-bit version.

See a parametric table of the complete family of pin-compatible, 12-/14-/16-bit high-speed DACs.

Key Features

Applications/Uses

74dB ACLR at f_OUT = 61.44MHz (Single-Carrier WCDMA)
Meets 3G UMTS, cdma2000®, GSM Spectral Masks (f_OUT = 122MHz)
Noise Spectral Density = -154dBFS/Hz at f_OUT = 16MHz
91dBc SFDR at Low-IF Frequency (10MHz)
88dBc SFDR at High-IF Frequency (50MHz)
Low Power: 886mW (f_CLK = 250MHz)
User Programmable
- Selectable 2x, 4x, or 8x Interpolating Filters
  - < 0.01dB Passband Ripple
  - > 99dB Stopband Rejection
- Selectable Real or Complex Modulator Operation
- Selectable Modulator LO Frequency: OFF, f_IM / 2 or f_IM / 4
- Selectable Output Filter: Lowpass or Highpass
- Channel Gain and Offset Adjustment
EV Kit Available (Order the MAX5894EVKIT)

	Analog Quadrature Modulation Architectures
	Base Stations: 3G UMTS, CDMA, and GSM
	Broadband Cable Infrastructure
	Broadband Wireless Transmitters
	Instrumentation and Automatic Test Equipment (ATE)

Key Specifications: High-Speed DACs

Part Number

Features

Resolution (Bits)

f_CLK (Msps)

Number of Channels

SFDR @ f_OUT (dBc)

INL (±LSB)

DNL (±LSB)

Output Current (mA)

P_DISS (mW)

Interface

Supply Voltage (V)

Price^**

MAX5894

•	Interpolation Filter

•	Modulation

500

90 @ 10MHz

0.5

896

Parallel

3.3 & 1.8

$17.85 @ 1k

See All High-Speed DACs (44)

Notes:
^**This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorized distributor.