The MAX2390-MAX2393/MAX2396/MAX2400 (referred to as the MAX2390 family) fully integrated direct-conversion receiver ICs are designed for W-CDMA and TDSCDMA
applications.
The MAX2390 family of receiver ICs have over 90dB of dynamic gain control, and typical noise figure of 2.7dB referred to LNA input. Each receiver consists of an ultra-low-current low-noise amplifier (LNA) with on-chip output matching and a two-step gain control. The zero-IF demodulator has a differential circuit topology for minimum LO leakage to receiver's input. The channel selectivity is done completely in the baseband section of the receiver with an on-chip lowpass filter. The AGC section has over 50dB of gain-control range. LO quadrature
generation is done on-chip through a divide-by-2 prescaler. The DC offset cancellation in the I/Q baseband channels is done fully on-chip using a DC servo loop. To quickly correct for large DC offset transients in minimal time, very fast settling time is obtained by optimization of the DC-offset-cancellation circuit's time constant.
The MAX2390 family includes a 3-wire serial bus for configuring the different receiver modes. They also include a SHDN-bar pin for full device shutdown. The
receivers are fabricated using an advanced high-frequency SiGe BiCMOS process. The ICs operate from a single +2.7V to +3.3V supply and are housed in a small
28-pin leadless QFN-EP package (5mm x 5mm).
Key Features
Applications/Uses
Fully Monolithic Direct-Conversion Receivers
Eliminates External IF SAW + IF AGC + I/Q Demod
Meets all 3GPP Receiver's Standard
Requirements with at Least 3dB Margin on Eb/No
Notes: **This pricing is BUDGETARY, for comparing similar parts. Prices are in
U.S. dollars and subject to change. Quantity pricing may vary
substantially and international prices may differ due to local
duties, taxes, fees, and exchange rates. For volume-specific prices
and delivery, please see the price and availability page
or contact an authorized distributor.
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